Static analysis was developed as an alternative method of worst-case execution time estimation to measurement.

Static analysis techniques rely on having a precisely accurate model of the timing behaviour of the microprocessor, including the effects of pipelines, caches, memory, buses, and any other hardware features that affect the execution time of machine instructions. Static analysis techniques analyse the object code for the program, and compute the worst-case path and worst-case execution time by reference to the model of the processor's timing behaviour. This is done without running the code.

Advantages:

• Static analysis aims to obtain an upper bound on the worst-case execution time.
• Static analysis can identify the worst-case path.
• No measurements are required.

Disadvantages:

• The execution times computed by static analysis are entirely dependent on the accuracy of the timing model used.
• Building and verifying the timing model for each microprocessor variant is expensive, time consuming, and error prone. This is reflected in the high cost of commercial static analysis tools.
• Custom variants and different versions of silicon often have subtly different timing behaviours rendering timing models either incorrect, or unavailable.
• To obtain execution time performance information from static analysis requires that all essential information about program flow is captured in the program / object code. This means that it is very costly in terms of engineering time to analyse complex programs. Large numbers of annotations need to be added by hand before any meaningful results can be obtained.
• Maintenance of annotations is an additional burden and a potential source of errors.
• Static analysis is only commercially viable on relatively simple, static programs whose scope happens to fall within the tool's inherent limitations.

Alternative methods of WCET estimation include measurement, and hybrid approaches combining both static analysis and measurement techniques.