Your browser does not support JavaScript! Skip to main content
Free 30-day trial DO-178C Handbook RapiCoupling Preview DO-178C Multicore Training Multicore Resources
Rapita Systems
 

Industry leading verification solutions

View All

Software Verification with RVS

RapiTest - Functional testing RapiCover - Coverage analysis RapiTime - Timing analysis RapiTask - RTOS scheduling visualization RapiCoverZero - Zero-footprint coverage analysis RapiTimeZero - Zero-footprint timing analysis RapiTaskZero - Zero-footprint scheduling analysis RVS Qualification Kits - Tool qualification for DO-178C RapiCouplingPreview - DCCC analysis

Multicore Verification with MACH178

MACH178 Core Pack - Getting started MACH178 Platform Pack - Platform evaluation MACH178 Resource Pack - Interference verification MACH178 Qualification Pack- Tool qualification

Product-related services

Tool Integration Training Consultancy Support

Other Solutions

RTBx - The ultimate data logging solution Sim68020 - Motorola 68020 Simulation

Using Our Solutions

RVS Development roadmap Product life cycle policy RVS Assurance issue policy

Latest from Rapita HQ

Latest news

Rapita Systems Collaborates with Wind River to Break the Multicore Certification Barrier
MACH178 Rapita Systems Launches Next Generation of MACH178 for Multicore
RVS 3.24 accelerates multicore software verification
Rapita Systems and Avionyx Announce Strategic Partnership to Offer Best-in-class Avionics Solutions
View News

Latest from the Rapita blog

The Evolution of DO-178 and ED-12 Standards
Retro gaming with the Sim68020
RVS gets a new timing analysis engine
How to measure stack usage through stack painting with RapiTest
View Blog

Latest discovery pages

Processor How to achieve multicore DO-178C certification with Rapita Systems
Plane How to achieve DO-178C certification with Rapita Systems
Military Drone Certifying Unmanned Aircraft Systems
control_tower DO-278A Guidance: Introduction to RTCA DO-278 approval
View Discovery pages

Upcoming events

DASC 2026
2026-09-13
DO-178C Multicore Virtual Training
2026-09-29
HISC 2026
2026-10-13
Supporting Multicore Interference Analysis using Branch Traces
2026-11-24
View Events

Technical resources for industry professionals

Latest White papers

Mitigation of interference in multicore processors for A(M)C 20-193
Sysgo WP
Developing DO-178C and ED-12C-certifiable multicore software
DO178C Handbook
Efficient Verification Through the DO-178C Life Cycle
View White papers

Latest Videos

Supporting Multicore Interference Analysis using Branch Traces
Multicore Avionics (Aerospace Innovations)
Certification-Ready Rust: GNAT Pro & RVS for Avionics Standards
Accelerated software verification with RVS 3.23
View Videos

Latest Case studies

Case Study Front Cover
Multicore timing analysis support for ECSS-E-ST-40C R&D with MACH178
GMV case study front cover
GMV verify ISO26262 automotive software with RVS
Kappa: Verifying Airborne Video Systems for Air-to-Air Refueling using RVS
View Case studies

Other Resources

 Webinars

 Brochures

 Product briefs

 Technical notes

 Research projects

 Flyers

 Multicore resources

Discover Rapita

About us

The company menu

  • Customers
  • Partners & Distributors
  • Research projects
  • Contact us
  • Careers
  • Working at Rapita
  • Subscribe to newsletter

Industries

  Civil Aviation (DO-178C)   Military & Defense   Automotive (ISO 26262)   Space

Standards

  DO-178C   A(M)C 20-193

US office


info@rapitasystems.com Rapita Systems, Inc., 41131 Vincenti Ct., Novi, MI 48375, USA

UK office

+44 (0)1904 413945
info@rapitasystems.com Rapita Systems Ltd., Atlas House, Osbaldwick Link Road, York, YO10 3JB, UK

Spain office

+34 93 351 02 05
info@rapitasystems.com Rapita Systems S.L., Parc UPC, Edificio K2M, c/ Jordi Girona, 1-3, Barcelona 08034, Spain
Back to Top

Tools to help real-time embedded programmers learn their trade

2013-01-24

Over at The Engineer the debate about "should everyone be a programmer?" rages on. I thought hard about this today in the context of our own work, and concluded that a large part of the difficulty and the skill of programming comes from the disconnect between the text of the program and the behaviour of that program. Just as the text of a recipe isn't the same as cooking the meal, reading program source code requires some imagination to think about what the program will cause the computer to do. This is where good documentation, function names and variable names and well-designed APIs bear fruit, helping the programmer to quickly build a mental model of the computer's behaviour.

One of the benefits of analysis tools like RapiTime is that they intrinsically relate the static program text to the dynamic behaviour of the program. The on-target instrumentation captures a trace of execution history during actual test execution, and the entries in the trace correspond to specific positions in the source code. We track execution context - the complete call stack to reach the subprogram - to distinguish different execution paths that lead to the same code. With Rewind View we tie this all together by showing the trace position and source code position along with the execution stack, and allowing the user to step forwards and backwards to animate the static view into specific instances of the dynamic behaviour. This allows the user to try things out and get immediate feedback on what’s happening, which is useful both for learning and for diagnostics.

Our upcoming product plans include a more advanced trace visualisation offering. In this view, the trace is indexed not by trace position as in Rewind view, but by the passage of time. Things that take longer look longer. Things that interrupt or are called explicitly are shown taking over execution and then handing it back. We can compare different instances of the same function execution and visualise their differences. A graphical visualisation also gives the user a visual pattern with which to spot desired, expected and unexpected patterns of behaviour.

Perhaps in the future we will be able to peer directly into the black box of the processor and fully experience what's happening, nanosecond by nanosecond. Until then, automated instrumentation provides a valuable way to relate the actual behaviour to the pages of program source code on the screen. Whether you’re just starting out in programming or you’re a seasoned professional, such insight is fundamental to the creation of safe and reliable software.

DO-178C webinars

DO178C webinars

White papers


Mitigation of interference in multicore processors for A(M)C 20-193
Sysgo WP
Developing DO-178C and ED-12C-certifiable multicore software
DO178C Handbook
Efficient Verification Through the DO-178C Life Cycle

A Commercial Solution for Safety-Critical Multicore Timing Analysis
  • Solutions
    • Rapita Verification Suite
    • RapiTest
    • RapiCover
    • RapiTime
    • RapiTask
    • MACH178
  • Latest
  • Latest menu

    • News
    • Blog
    • Events
    • Videos
  • Success Stories
  • Success Stories Menu

    • Airbus Defence & Space
    • BAE Systems
    • Cobham
    • Collins Aerospace
    • Leonardo
  • Downloads
  • Downloads menu

    • Brochures
    • Webinars
    • White Papers
    • Case Studies
    • Product briefs
    • Technical notes
    • Software licensing
  • Company
  • Company menu

    • About Rapita
    • Careers
    • Customers
    • Industries
    • Locations
    • Partners
    • Research projects
    • Contact
  • Discover
    • Multicore Timing Analysis
    • Worst Case Execution Time
    • WCET Tools
    • Code coverage for Ada, C & C++
    • MC/DC Coverage
    • Verifying additional code for DO-178C
    • Data Coupling & Control Coupling
    • DO-178C
    • AC 20-193 and AMC 20-193
    • Certifying eVTOL
    • Certifying UAS

All materials © Rapita Systems Ltd. 2026 - All rights reserved | Privacy information | Trademark notice Subscribe to our newsletter