- How DDC-I and Rapita can provide an end-to-end solution for addressing CAST-32A objectives.
- How to integrate the RVS toolsuite on Deos for on-target safety-critical timing analysis.
- How to use RapiTask and RapiTime to automate the collection of verification results for multicore timing analysis.
- How RapiDaemon interference generators operate, using an example demonstrating the value of Deos’s Cache Partitioning and its ability to reduce interference and WCET.
A technical webinar
A primary challenge designers of modern avionics systems face today is how to implement an efficient means of verifying multicore systems. Specifically, one of the more daunting multicore development tasks is to quantify and optimize an application’s worst-case execution times – especially in the context of multicore interference caused by applications running on other cores that share common resources (e.g. cache, memory, etc.). Up to now, most avionics companies have had to develop or integrate their own tooling for this capability.
This webinar addresses this critical but basic multicore system need. Rapita Systems, developer of software tools for on-target verification, optimization and code coverage analysis of critical real-time embedded systems, and DDC-I, supplier of DO-178 certifiable software and tools for safety critical avionics software developers, partner to offer an ‘out-of-the-box’ integration combining DDC-I’s Deos (time and space partitioned RTOS) with Rapita’s RapiTime (on-target timing) and RapiTask (scheduling visualization and analysis). This not only works on traditional single-core deployments but also for multicore systems running Deos.
DDC-I has been refining Deos’s DAL-A multicore strategy and features for well over a decade, developing an RTOS that effectively addresses the objectives of CAST-32A. Deos’s use of advanced technologies – such as cache partitioning – enables greater performance to be harnessed in the multicore system, whilst also maintaining re-use and functional capabilities.
Rapita has worked closely with DDC-I to develop this seamless, hardware-agnostic integration of RVS with Deos, which is portable to every architecture supported by Deos (PowerPC, ARM, and x86). In this approach, tracing is accomplished by applying RVS instrumentation with a trace mechanism available within the Deos kernel. Further, RapiDaemons (interference generators) provide the means to simulate applications running on other cores and imposing upon shared resources. Together, all of these capabilities enable the integrator to qualify Deos-based multicore systems and determine how to best arrange multicore applications for optimal systems performance.