Skip to main content
SAIF Autonomy to use RVS to verify their groundbreaking AI platform
RVS 3.22 Launched
Hybrid electric pioneers, Ascendance, join Rapita Systems Trailblazer Partnership Program
Magline joins Rapita Trailblazer Partnership Program to support DO-178 Certification
How emulation can reduce avionics verification costs: Sim68020
Multicore timing analysis: to instrument or not to instrument
How to certify multicore processors - what is everyone asking?
Data Coupling Basics in DO-178C
Certifying Unmanned Aircraft Systems
DO-278A Guidance: Introduction to RTCA DO-278 approval
ISO 26262
Data Coupling & Control Coupling
DASC 2025
DO-178C Multicore In-person Training (Fort Worth, TX)
DO-178C Multicore In-person Training (Toulouse)
HISC 2025
The Embedded Real Time Systems (ERTS) Congress is an annual, international, cross-sector event on embedded software and systems. It serves as a platform for researchers, industry professionals, and academics to come together and discuss the latest advancements in real-time systems. The congress features presentations, workshops, and networking opportunities, making it a valuable gathering for those working in embedded software and systems seeing you there.
Rapita will be exhibiting at this year's event. We are excited to see you there!
Separation of functional and time interferences concerns for efficient AMC 20-193 compliance | ||
|---|---|---|
Day 1 17:00-18:00 | Lauraguais Room | D. Chabrol, J. Guyomarc'H, F. Siron, G. Phavorin, S. Thompson, E. Jenn & F. Thurieau |
Safety-critical real-time systems must comply with stringent certification requirements, including temporal ones. Failure to comply with those temporal requirements may contribute to the system failure. Therefore, timing considerations, such as response times, are of the foremost importance for such systems.
As the use of multi-/many-core hardware platforms is becoming inevitable in the avionics industry, due to the increasing computing performance required by modern embedded systems, integration activities are getting more and more complex. Increasing concurrency and parallelism exacerbates integration issues and introduces new challenging problems.
To answer those challenges, certification authorities have issued guidelines, referenced as A(M)C 20-193, describing some objectives to fulfill for multi-/many-core integration. The present paper describes how a time-aware approach, based on the Synchronous Logical Execution Time paradigm (sLET), makes the design and integration of A(M)C 20-193 compliant safety-critical multi-/many-core systems easier by separating functional and time interferences concerns.
The paper was produced by authors:
- Damien Chabrol - ASTERIOS Technologies, France
- Jean Guyomarc'H - ASTERIOS Technologies, France
- Fabien Siron - ASTERIOS Technologies, France
- Guillaume Phavorin - ASTERIOS Technologies, France
- Sam Thompson - Rapita Systems Ltd, United Kingdom
- Eric Jenn - IRT Saint Exupéry, France
- François Thurieau - Safran Electronics & Defense, France
More information about the program is available at on ERTS' website.
