AMACC Rev B & Multicore Certification: What U.S. Defense Programs Need to Know for Airworthiness Success

The U.S. Army’s latest revision of the Army Military Airworthiness Certification Criteria (AMACC Rev B) introduces a major shift in how multicore processors must be assessed and documented for airworthiness approval. The guidance moves from broad objectives to 163 explicit requirements, giving defense programs a clearer roadmap for successful certification.

In this on-demand webinar, we explore the multicore objectives defined within AMACC and highlight their relationship to A(M)C 20-193.

What will you learn?

• What AMACC is, who it applies to, and how it relates to standards such as DO-178C, ARP4754B, and A(M)C 20-193
• How AMACC multicore objectives align with A(M)C 20-193 requirements, including resource usage, software verification, and error handling
• The major differences between AMACC and A(M)C 20-193
• How Rapita Systems' MACH¹⁷⁸ supports compliance with multicore certification objectives