Your browser does not support JavaScript! Skip to main content
Free 30-day trial Customer portal Careers DO-178C Handbook
 
Rapita Systems
 

Industry leading verification tools & services

Rapita Verification Suite (RVS)

  RapiTest - Unit/system testing   RapiCover - Structural coverage analysis   RapiTime - Timing analysis (inc. WCET)   RapiTask - Scheduling visualization   RapiCoverZero - Zero footprint coverage analysis   RapiTimeZero - Zero footprint timing analysis   RapiTaskZero - Zero footprint scheduling analysis

Multicore verification

  MACH178   Multicore Timing Solution   RapiDaemons

Services

  V & V Services   Qualification   Training   Tool Integration  Support

Industries

  Aerospace (DO-178C)   Automotive (ISO 26262)   Space

Other

  RTBx   Mx-Suite   Software licensing   Product life cycle policy  RVS development roadmap

Latest from Rapita HQ

Latest news

RVS 3.18 Launched
Solid Sands partners with Rapita Systems
Danlaw Acquires Maspatechnologies - Expanding Rapita Systems to Spain
Rapita co-authored paper wins ERTS22 Best paper award
View News

Latest from the Rapita blog

Measuring response times and more with RapiTime
Why mitigating interference alone isn’t enough to verify timing performance for multicore DO-178C projects
There are how many sources of interference in a multicore system?
Supporting modern development methodologies for verification of safety-critical software
View Blog

Latest discovery pages

do178c DO-178C Guidance: Introduction to RTCA DO-178 certification
matlab_simulink MATLAB® Simulink® MCDC coverage and WCET analysis
code_coverage_ada Code coverage for Ada, C and C++
amc-20-193 AMC 20-193
View Discovery pages

Upcoming events

Aeromart Montreal 2023
2023-04-04
Certification Together International Conference
2023-05-10
View Events

Technical resources for industry professionals

Latest White papers

DO178C Handbook
Efficient Verification Through the DO-178C Life Cycle
A Commercial Solution for Safety-Critical Multicore Timing Analysis
Compliance with the Future Airborne Capability Environment (FACE) standard
View White papers

Latest Videos

Streamlined software verification with RVS 3.18
Sequence analysis with RapiTime
Visualize call dependencies with RVS thumbnail
Visualize call dependencies with RVS
Analyze code complexity thumbnail
Analyze code complexity with RVS
View Videos

Latest Case studies

Supporting ISO 26262 ASIL D software verification for EasyMile
RapiCover’s advanced features accelerate the certification of military UAV Engine Control
Front cover of whitepaper collins
Delivering world-class tool support to Collins Aerospace
View Case studies

Other Downloads

 Webinars

 Brochures

 Product briefs

 Technical notes

 Research projects

Discover Rapita

Who we are

The company menu

  • About us
  • Customers
  • Distributors
  • Locations
  • Partners
  • Research projects
  • Contact us

US office

+1 248-957-9801
info@rapitasystems.com
Rapita Systems, Inc.
41131 Vincenti Ct.
Novi
MI 48375
USA

UK office

+44 (0)1904 413945
info@rapitasystems.com
Rapita Systems Ltd.
Atlas House
Osbaldwick Link Road
York, YO10 3JB
UK

Spain office

+34 930 46 42 72
info@rapitasystems.com
Rapita Systems S.L.
Parc UPC, Edificio K2M
c/ Jordi Girona, 1-3, Office 306-307
Barcelona 08034
Spain

Working at Rapita

Careers

Careers menu

  • Current opportunities & application process
  • Working at Rapita
Back to Top

Rapita and Lauterbach Provide Combined Solution for Timing Analysis and Quality Assurance

Breadcrumb

  1. Home
  2. Latest news
  3. Rapita and Lauterbach Provide Combined Solution for Timing Analysis and Quality Assurance
2009-04-09
Lauterbach's TRACE32 PowerTrace hardware module provides a proven method of capturing the timing trace data required by RapiTime for measuring application performance and calculating worst-case execution time (WCET). Using PowerTrace as an external timing trace data capture device has the advantage that the instrumentation code required can be made extremely efficient in terms of both code size and execution time overhead. As accurate timestamps are applied externally by PowerTrace, each instrumentation point (automatically added to the code by RapiTime) simply needs to write its ID to an address or register monitored via the trace port (NEXUS or ETM). On many embedded targets, this can be achieved in a single assembler instruction, and so is inherently thread safe. Once the source code has been instrumented using RapiTime, compiled and linked, it can be downloaded by TRACE32 onto the target ready for testing. A trace of the software's timing behaviour can now be obtained by automatically running a series of tests on the target and capturing the trace data using PowerTrace. Once the trace data has been captured, the data is converted to RapiTime's native format, allowing a full analysis of the captured time frame. The Lauterbach's TRACE32 PowerTrace provides a simple and effective means of capturing timing trace data for use by RapiTime. This solution minimises measurement overheads by supporting minimal instrumentation points (typically a single assembler instruction) via the use of external time-stamping. About RapiTime RapiTime from Rapita Systems Ltd. is an on-target performance profiling and timing analysis tool, which provides worst-case execution time measurements and reduces the cost of achieving significant optimizations in execution time for complex systems implemented in C or Ada. RapiTime can automatically instrument the code at various levels of abstraction from function nor sub-program boundaries, down to the sub-paths between individual decision points. The instrumented software is then executed on the embedded target, and subject to extensive testing. During testing, when each instrumentation point is executed, it's identifier and a timestamp are captured in a trace of the software's execution. RapiTime processes the trace data obtained during testing and combines it with structural information derived from analysis of the source code. The result is a wealth of detailed timing information about the system. For information about RapiTime see the documentation available from http://www.rapitasystems.com About TRACE32 PowerTrace Lauterbach GmbH is the leading manufacturer of complete, modular microprocessor development tools ranging from In Circuit Emulators and Logic Analysers for system integration to JTAG-Debuggers and instruction set simulators for software applications. TRACE32 PowerTrace provides fast and systematic trouble shooting capabilities to detect complex errors that only occur under run-time conditions. In addition the program and data flow recorded by the real-time trace is time-stamped, thus allowing overall analysis of the system's performance. The huge amount of trace information that can be collected provides a basis for quality assurance features like code coverage or cache analysis. Further information is available from http://www.lauterbach.com
  • Solutions
    • Rapita Verification Suite
    • RapiTest
    • RapiCover
    • RapiTime
    • RapiTask
    • MACH178

    • Verification and Validation Services
    • Qualification
    • Training
    • Integration
  • Latest
  • Latest menu

    • News
    • Blog
    • Events
    • Videos
  • Downloads
  • Downloads menu

    • Brochures
    • Webinars
    • White Papers
    • Case Studies
    • Product briefs
    • Technical notes
    • Software licensing
  • Company
  • Company menu

    • About Rapita
    • Careers
    • Customers
    • Distributors
    • Industries
    • Locations
    • Partners
    • Research projects
    • Contact
  • Discover
    • AMC 20-193
    • What is CAST-32A?
    • Multicore Timing Analysis
    • MC/DC Coverage
    • Code coverage for Ada, C & C++
    • Embedded Software Testing Tools
    • Aerospace Software Testing
    • Automotive Software Testing
    • Certifying eVTOL
    • DO-178C
    • WCET Tools
    • Worst Case Execution Time
    • Timing analysis (WCET) & Code coverage for MATLAB® Simulink®

All materials © Rapita Systems Ltd. 2023 - All rights reserved | Privacy information | Trademark notice Subscribe to our newsletter