ASC is an R&D project led by Rapita Systems which aims to increase the amount of software that can be executed in safety-critical embedded systems such as jet engines to support increased functionality, reduce project costs, and delay expensive hardware upgrades; this work is funded by NATEP.
ASC will reduce hardware requirements and support increasingly adopted multi-core hardware by developing a unique solution to calculating the capacity of safety-critical avionics systems. This solution will combine the existing RapiTime software execution time analysis tool, a new "transition-based" approach for timing analysis, and microbenchmarks that create inter-core interference in multicore systems to support multicore timing analysis. This work is in line with DO-178C and CAST-32A guidance.
The project will run for 18 months from February 2018. Leading the project, Rapita Systems will work with project partners:
- Altran UK Ltd
- Rolls Royce, GE & BAE Systems (end users)
- Barcelona Supercomputing Center (non-funded partner)