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Rapita Verification Suite (RVS)

RapiTest - Functional testing for critical software RapiCover - Low-overhead coverage analysis for critical software RapiTime - In-depth execution time analysis for critical software RapiTask - RTOS scheduling visualization RapiCoverZero - Zero-footprint coverage analysis RapitimeZero - Zero-footprint timing analysis RapiTaskZero - Zero-footprint event-level scheduling analysis RVS Qualification Kits - Tool qualification for DO-178 B/C and ISO 26262 projects RapiCoupling - DCCC analysis

Multicore Verification

MACH178 - Multicore Avionics Certification for High-integrity DO-178C projects MACH178 Foundations - Lay the groundwork for A(M)C 20-193 compliance Multicore Timing Solution - Solving the challenges of multicore timing analysis RapiDaemon - Analyze interference in multicore systems

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RTBx - The ultimate data logging solution Sim68020 - Simulation for the Motorola 68020 microprocessor

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Rapita partners with Asterios Technologies to deliver solutions in multicore certification
SAIF Autonomy to use RVS to verify their groundbreaking AI platform
RVS 3.22 Launched
Hybrid electric pioneers, Ascendance, join Rapita Systems Trailblazer Partnership Program
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Latest from the Rapita blog

How emulation can reduce avionics verification costs: Sim68020
Multicore timing analysis: to instrument or not to instrument
How to certify multicore processors - what is everyone asking?
Data Coupling Basics in DO-178C
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Latest discovery pages

Military Drone Certifying Unmanned Aircraft Systems
control_tower DO-278A Guidance: Introduction to RTCA DO-278 approval
Picture of a car ISO 26262
DCCC Image Data Coupling & Control Coupling
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Upcoming events

IEEE SMC-IT/SCC 2025
2025-07-28
DASC 2025
2025-09-14
DO-178C Multicore In-person Training (Fort Worth, TX)
2025-10-01
DO-178C Multicore In-person Training (Toulouse)
2025-11-04
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Technical resources for industry professionals

Latest White papers

Mitigation of interference in multicore processors for A(M)C 20-193
Sysgo WP
Developing DO-178C and ED-12C-certifiable multicore software
DO178C Handbook
Efficient Verification Through the DO-178C Life Cycle
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Latest Videos

How to make AI safe in autonomous systems with SAIF
Rapita Systems - Safety Through Quality
Simulation for the Motorola 68020 microprocessor with Sim68020
AI-driven Requirements Traceability for Faster Testing and Certification
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Latest Case studies

GMV case study front cover
GMV verify ISO26262 automotive software with RVS
Kappa: Verifying Airborne Video Systems for Air-to-Air Refueling using RVS
Supporting DanLaw with unit testing and code coverage analysis for automotive software
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+1 248-957-9801
info@rapitasystems.com Rapita Systems, Inc., 41131 Vincenti Ct., Novi, MI 48375, USA

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Unlocking DO-178C Compliance Webinar

701Pc000008BbIzIAK
Webinar — 26th March 2024 at 4PM (CET)
When you contact us, we will process your personal data in accordance with our data protection policy, please see our Customer Privacy Information for more information.

DO-178C objective 6.4.4.c includes a required activity to verify additional code introduced by the compiler for DAL A projects i.e. code, that cannot be traced to Source Code, to demonstrate the correctness of such additional code sequences.

Often called a “hidden” activity of DO-178C, its placement within the 6.4.4.c objective can lead to confusion.

At first glance, objective 6.4.4.c is about test coverage of software structure rather than verification, yet activity 6.4.4.2.b clearly requires demonstrating that the correctness of the object code has been verified. Demonstrating coverage and correctness are very different things.

In this webinar you will learn why this activity is different to other activities in 6.4.4.c and how to perform it.

Presenters

Dr. Guillem Bernat - CEO of Rapita Systems Ltd.

Dr. Guillem Bernat is the CEO of Rapita Systems Ltd. He received his PhD in Computer Science from the Universitat de les Illes Balears in Spain, in 1998 and then took a lecturing position at the Real-Time Systems Group at the University of York in the UK. In 2004 he founded Rapita Systems to commercialise technology for measurement based worst-case execution time analysis technology. Rapita Systems has grown to provide a set of software verification tools for safety critical systems including timing analysis, WCET analysis and structural code coverage to satisfy DO-178B/C and ISO26262 objectives. Dr. Bernat has more than 70 published papers in international conferences and Journals, has lectured extensively in real-time systems and is a frequent speaker at international conferences.

Dr. Matthew Grum - Head of Field Application Engineering

Dr. Matthew Grum graduated from the University of York in 2009 with a specialization in Computer Vision. Since joining Rapita in 2015, he transitioned from software development to Field Application Engineering. Currently, Dr. Grum is the Head of the department and he is responsible for customer support, tool integration, training, and contributing to product development.

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