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Demonstrating how to “Rewind” backwards and forwards through recorded traces with RapiTime 2.3
Rapita’s Dr Paul Emberson recently travelled to Cambridge to demo one of the new features from the latest version of RapiTime at The Embedded Masterclass 2010. Here he explains his thoughts on the day and the emerging benefits of the new software.
What should we really think about measuring WCET?
Following on from my last blog post grumbling about the mixing of terminologies from timing and safety domains, this post explains some of the background to WCET analysis and what RapiTime does.
Hardware acceleration features that make real-time hard – an overview
New performance-enhancing features in modern processors can mean it is harder, not easier, to establish the worst-case execution time (WCET) of an application. Why is this happening?
Hardware acceleration features that make real-time hard – pipelined architectures
In a recent blog post we observed how the presence of advanced hardware features in modern processors makes it more difficult to establish the worst-case execution time (WCET) of an application. Continuing this theme, let’s examine the use of pipelined processor architectures and the effect that this has on WCET in real-time systems.
Hardware acceleration features that make real-time hard - instruction caches
Continuing our series on how the presence of advanced hardware features in modern processors makes it more difficult to establish the worst-case execution time (WCET) of an application, this week we examine the issues surrounding the use of instruction caches in CPUs and the effect that this has on WCET in real-time systems.
Tools to help real-time embedded programmers learn their trade
Over at The Engineer the debate about "should everyone be a programmer?" rages on. Here are Zoe Stephenson's thoughts.
Hardware acceleration features that make real-time hard - multicore
Welcome back to the series of blog posts on how the presence of advanced hardware features in modern processors makes it more difficult to establish the worst-case execution time (WCET) of an application. This week, we consider the difficulties presented by one recent development in CPU design: multicore processors.
PowerPC and TriCore timing variability: which is the more predictable?
We recently tested a system with two different processors, a PowerPC and a TriCore. For anyone concerned with variability, the results make for interesting reading.
If RapiTime provides Ipoint coverage, why do I need RapiCover?
Users of RapiTime will probably be aware that one of the categories of information shown in a RapiTime report is "Ipoint Coverage". So, given that RapiTime supplies coverage information, why do you need RapiCover?
