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Rapita Systems
 

Industry leading verification tools

Rapita Verification Suite (RVS)

RapiTest - Functional testing for critical software RapiCover - Low-overhead coverage analysis for critical software RapiTime - In-depth execution time analysis for critical software RapiTask - RTOS scheduling visualization RapiCoverZero - Zero-footprint coverage analysis RapitimeZero - Zero-footprint timing analysis RapiTaskZero - Zero-footprint event-level scheduling analysis RVS Qualification Kits - Tool qualification for DO-178 B/C and ISO 26262 projects RapiCoupling - DCCC analysis

Multicore Verification

MACH178 - Multicore Avionics Certification for High-integrity DO-178C projects MACH178 Foundations - Lay the groundwork for A(M)C 20-193 compliance Multicore Timing Solution - Solving the challenges of multicore timing analysis RapiDaemon - Analyze interference in multicore systems

Other

RTBx - The ultimate data logging solution Sim68020 - Simulation for the Motorola 68020 microprocessor

RVS Software Policy

Software licensing Product life cycle policy RVS Assurance issue policy RVS development roadmap

Industry leading verification services

Engineering Services

V&V Services Data Coupling & Control Coupling Object code verification Qualification Training Consultancy Tool Integration Support

Latest from Rapita HQ

Latest news

Rapita partners with Asterios Technologies to deliver solutions in multicore certification
SAIF Autonomy to use RVS to verify their groundbreaking AI platform
RVS 3.22 Launched
Hybrid electric pioneers, Ascendance, join Rapita Systems Trailblazer Partnership Program
View News

Latest from the Rapita blog

How emulation can reduce avionics verification costs: Sim68020
Multicore timing analysis: to instrument or not to instrument
How to certify multicore processors - what is everyone asking?
Data Coupling Basics in DO-178C
View Blog

Latest discovery pages

Military Drone Certifying Unmanned Aircraft Systems
control_tower DO-278A Guidance: Introduction to RTCA DO-278 approval
Picture of a car ISO 26262
DCCC Image Data Coupling & Control Coupling
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Upcoming events

DASC 2025
2025-09-14
DO-178C Multicore In-person Training (Fort Worth, TX)
2025-10-01
DO-178C Multicore In-person Training (Toulouse)
2025-11-04
HISC 2025
2025-11-13
View Events

Technical resources for industry professionals

Latest White papers

Mitigation of interference in multicore processors for A(M)C 20-193
Sysgo WP
Developing DO-178C and ED-12C-certifiable multicore software
DO178C Handbook
Efficient Verification Through the DO-178C Life Cycle
View White papers

Latest Videos

How to make AI safe in autonomous systems with SAIF
Rapita Systems - Safety Through Quality
Simulation for the Motorola 68020 microprocessor with Sim68020
AI-driven Requirements Traceability for Faster Testing and Certification
View Videos

Latest Case studies

GMV case study front cover
GMV verify ISO26262 automotive software with RVS
Kappa: Verifying Airborne Video Systems for Air-to-Air Refueling using RVS
Supporting DanLaw with unit testing and code coverage analysis for automotive software
View Case studies

Other Resources

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 Technical notes

 Research projects

 Multicore resources

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US office

+1 248-957-9801
info@rapitasystems.com Rapita Systems, Inc., 41131 Vincenti Ct., Novi, MI 48375, USA

UK office

+44 (0)1904 413945
info@rapitasystems.com Rapita Systems Ltd., Atlas House, Osbaldwick Link Road, York, YO10 3JB, UK

Spain office

+34 93 351 02 05
info@rapitasystems.com Rapita Systems S.L., Parc UPC, Edificio K2M, c/ Jordi Girona, 1-3, Barcelona 08034, Spain
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Blog

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Code coverage for applications running on Windows

I was recently asked by a customer if they could use RapiTime to analyse a program compiled for Windows using GCC and…

2010-06-24

Demonstrating how to “Rewind” backwards and forwards through recorded traces with RapiTime 2.3

Rapita’s Dr Paul Emberson recently travelled to Cambridge to demo one of the new features from the latest version of…

2010-06-17

Getting TriCore PCP inline assembly right

This macro (see below) toggles (0 becomes 1, 1 becomes 0) one of eight output pins of the Infineon TriCore 1797 port

2010-06-03

A five step process for optimization

This post introduces a five step process for optimizations.

2010-05-28

Three tips for successful optimization projects

To ensure a successful optimization project, here are three vital things that you might not have thought about before

2010-05-20

Optimization... Is it right for you?

"So, the software isn't fast enough...what next?"

2010-05-13

Understanding the value of WCET optimisation within high-integrity real-time software

High-integrity software is typically thought of as being carefully constructed according to rigorous development…

2010-05-06

Cache Memory: the hardware acceleration feature that can slow you down

Most processors now use caches to reduce the average time to access memory. What do you need to know about the possible…

2010-04-29

Welcome to the Rapita Systems blog

Welcome to the new Rapita Systems blog.

2010-04-23

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