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A look back on Rapita's Multicore DO-178C training in Huntsville
RVS 3.17 Launched
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Why mitigating interference alone isn’t enough to verify timing performance for multicore DO-178C projects
There are how many sources of interference in a multicore system?
Supporting modern development methodologies for verification of safety-critical software
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do178c DO-178C Guidance: Introduction to RTCA DO-178 certification
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A Commercial Solution for Safety-Critical Multicore Timing Analysis
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  1. Home
  2. RVS
  3. CAST-32A Compliance Update July 2021
CAST-32A

Solving the challenges of multicore certification

What's new in the July Update

  •  A complete solution
  •  Reports
  •  Template compliance documents
  •  Process documents
  •  Characterization tests
  •  RapiDaemon qualification
  •  Tool automation
  •  Merge timing results
  •  Custom exports
Discover CAST-32A Compliance Request a demo
  • CAST-32A Compliance Update July 2021
  • CAST-32A Resources
  • Compatibility

A complete solution

Having learned a lot from our active CAST-32A Compliance projects, we have been developing new products and services that support the CAST-32A compliance workflow.

Complete compliance solution
Reports

Reports detailing the interference channels on a multicore platform and the results of experiments in which the impact of interference on those channels is characterized are one of the main outputs of a CAST-32A compliance project. We provide these reports for a range of multicore platforms.

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Reports
Template compliance documents
Template compliance documents

For CAST-32A compliance, the compliance workflow and verification results must be detailed in DO-178C planning and results documents.

Our template CAST-32A compliance documents offer a convenient blueprint that can be used to generate final DO-178C compliance documents. These documents can be completed as part of our Platform Analysis and Characterization and Software Analysis and Characterization Services, or if you are performing the analysis yourself, you can use the templates as a starting point to writing your compliance documents.

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Process documents

DO-178C certification requires detailed processes to be developed and followed for each stage of the overall DO-178C process.

We have been developing process documents that describe how to perform multicore platform and software analysis and characterization using the Rapita CAST-32A Compliance workflow. As well as providing supplementary evidence to support DO-178C certification, these documents can be used to perform this analysis and characterization yourselves.

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Process documents
Process documents
Characterization tests

CAST-32A compliance requires evidence that worst-case execution time (WCET) analysis has taken into account interference effects on a multicore platform. WCET analysis can be supported by tests to characterize the impact of interference on the platform.

Our characterization tests include test artifacts needed to analyze the potential impact of interference on multicore platforms and perform WCET analysis of software hosted on those platforms. Characterization Tests are developed for execution using RVS and RapiDaemons.

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RapiDaemon qualification

RapiDaemons, which apply configurable degrees of contention on shared multicore resources, are a key component of the CAST-32A Compliance Solution. As software tools, their use in DO-178C projects must be supported by DO-330 tool qualification evidence.

We have begun developing DO-330 qualification kits and a qualification service for RapiDaemons, which can be used to generate this evidence.

Qualification kitsQualification service

RapiDaemon qualification

Tool automation

We have been working on new features for the Rapita Verification Suite (RVS) to better support efficient multicore timing analysis for CAST-32A compliance. These new features will be available in the upcoming RVS 3.15 release.

Merge timing results

For multicore timing analysis, large amounts of data must be collected from multiple test runs and then processed to provide CAST-32A compliance evidence. To make the analysis more efficient, data may be collected from multiple platforms or at different time points.

We have added support for these use cases to RapiTime, which now lets you merge timing data from multiple test runs into a single report for further processing.

This feature will be available in RVS 3.15.

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Custom exports

Testing scenarios for multicore timing analysis typically require the collection of values of various performance monitoring counters during execution. The counters that must be collected can vary between different test runs.

We have added a feature to RVS to let you generate custom exports that include only the results you need to satisfy your test scenario. To create custom exports, you generate a template file in which you can add text, link to your requirements and test plans, and include RVS results through an API. You can then generate a report containing only the results you need each time you run your tests.

This feature will be available in RVS 3.15.

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Videos

Multicore Avionics Certification for High-integrity DO-178C projects
Multicore Avionics Certification for High-integrity DO-178C projects
00:03:02 | Overview
 
Tool automation in multicore timing analysis
00:07:08 | Explainer
 
Custom multicore exports with RVS
00:00:58 | Feature
 
Merging timing results with RapiTime
00:00:48 | Feature
 

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Downloads

  Webinar
A(M)C 20-193 vs. CAST-32A: What the change means for your DO-178C Multicore project
  Flyer
Why choose Rapita?
  Webinar
Verifying multicore hardware and software
  Webinar
Verifying your Multicore RTOS
  Webinar
Supplementing DO-178C activities for CAST-32A
  Webinar
Incremental Assurance of Multicore Integrated Modular Avionics (IMA)

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News & Blog

Blog 2022-01-05
Robust partitioning for multicore systems doesn’t mean freedom from interference
News 2020-11-23
Another successful DO-178C Virtual Training Course complete
News 2019-11-22
DO-178 & Multicore Training Bristol 2019
News 2019-10-31
Rapita Sponsor NXP's MultiCore For Avionics (MCFA) Conference 2019
News 2019-07-18
A look back on Rapita's DO-178C training workshop in San Diego
News 2018-11-16
Another successful DO-178C training workshop in Bristol

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Compatibility

We can analyze almost all multicore hardware architectures. See below for a list of components of multicore systems that we have analyzed.

Architectures

Here are some of the architectures we have worked with:

SoC Cores

Infineon® AURIX™

Tricore™

NVIDIA® Xavier™

Carmel Armv8

NXP® LS1048A

Arm® Cortex®-A53

NXP® LS1088M

Arm® Cortex®-A53

NXP® LX2160A

Arm® Cortex®-A72

NXP® P2041

PowerPC® e500mc

NXP® T1040

PowerPC® e5500

NXP® T2080/1

PowerPC® e6500

TI Keystone™ K2L

Arm® Cortex®-A15

Xilinx® Ultrascale+® Zynq MPSoC

Arm® Cortex®-A53, Arm® Cortex-R5

Xilinx® Ultrascale+® Zynq RFSoC

Arm® Cortex®-A53, Arm® Cortex-R5

RTOSs

Here are some of the RTOSs we have worked with:

RTOS

Bare metal

Blackberry® QNX™

DDC-I Deos™

Green Hills® INTEGRITY®

Lynx Software Technologies LynxSecure®

SYSGO PikeOS®

Vector MICROSAR

Wind River Helix®/VxWorks®

Boards

We have worked with multicore boards manufactured by the following manufacturers:

Board Manufacturer

Abaco™

Curtiss-Wright®

Mercury Systems®

North Atlantic Industries™

NXP®

Texas Instruments®

Xilinx®

Middleware

We have worked with middleware for multicore systems developed by the following manufacturers:

Middleware Supplier

CoreAVI®

GateWare Communications™

Presagis®

Richland Technologies™

 

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